Joint white paper finds today’s AI GPUs sit idle half to two-thirds of the time due to copper interconnect limits; MicroLED optical design modeled to cut interconnect energy ~80% and expand the one-hop AI pod from 72 GPUs to ~1,000, with a public demonstration slated for January 2027
NEW YORK, NY, Oct. 19, 2026 (GLOBE NEWSWIRE) — Fabric.AI, Inc. (Nasdaq: FABC) (“Fabric.AI” or the “Company”), a fabless semiconductor company developing MicroLED-based optical interconnects for AI infrastructure, today released a white paper with Kopin Corporation (Nasdaq: KOPN) that imagines how the copper wires inside AI data centers can be replaced with massively parallel MicroLED optical channels. The paper models that Neural I/o™, the MicroLED optical interconnect the two companies are jointly developing, could let a 10,000-GPU system deliver 1.3 to 1.6 times more useful training throughput per GPU, finishing the same training run in 23% to 38% less time, because the interconnect’s spare channels connect, synchronize and monitor the system instead of leaving GPUs waiting.
The white paper, “The Data Center in a SerDes-Free World,” is authored by Kopin Chief Executive Officer Michael Murray, and Fabric.AI Senior Strategic Advisor James Altucher. It looks past the performance of a single link to ask a system-level question: if the interconnect stops being the constraint, how should an AI data center be built?
The white paper can be found on Fabric A’s site here.
Today, the answer is set by copper, and copper can’t argue with physics. At 200 gigabits per second, a copper link reaches about one meter, and that meter caps a tightly connected AI compute domain at 72 GPUs in a single rack. A 10,000-GPU cluster is therefore roughly 139 separate domains joined by a slower network, and traffic that leaves a rack faces a four- to eight-fold drop in bandwidth. The paper cites typical model FLOPs utilization of 35% to 45% for frontier-scale dense training and 20% to 35% for mixture-of-experts training, meaning the most expensive machines in the world sit idle for half to two-thirds of their cycles, with a meaningful share of that loss traced to the interconnect.
“Every AI data center in the world is designed around how far copper can carry a signal, and that distance is about one meter,” said James Altucher, Senior Strategic Advisor to Fabric.AI. “The rack, the cooling, the density and the 72-GPU ceiling all follow from it. Fabric.AI was founded to remove that constraint. This paper is our system-level view of what replaces it: a row of a thousand GPUs that behaves like one machine, and an interconnect that does far more than move data.”
Neural I/o takes the opposite approach to the industry’s race for faster serial lanes. Instead of a few channels at extreme speed, it uses thousands of channels at modest speed: 2,025 physical optical channels at two gigabits per second each in a die about one millimeter square, with 1,600 channels carrying 3.2 terabits per second of payload and 425 reserved for redundancy and sideband functions. The link is built from MicroLEDs, image-sensor-derived receivers and molded plastic optics, is designed to run at approximately one picojoule per bit compared with four to six for copper and SerDes, and extends high-bandwidth reach from about one meter to tens of meters.
“The most interesting result isn’t raw bandwidth,” continued Mr. Altucher. “When you have 2,025 channels instead of a handful, the spare ones stop being insurance and start doing work. They fix errors, keep a thousand GPUs in step and watch the health of the system while it runs. Copper can’t do that, because copper has no spare channels to give.”
Key findings include:
- More work from the same GPUs. For a 10,000-GPU system, the architecture is modeled to raise training utilization from a typical 35% to 45% for dense models today to approximately 50% to 60%, delivering 1.3 to 1.6 times more useful training throughput per GPU. The gains come from reducing communication, synchronization and reliability losses, not from faster GPUs.
- The pod becomes the row. With reach measured in tens of meters, switches can move out of compute racks to the center of a row, and the one-hop compute domain can grow from 72 GPUs to roughly 576 to 1,152 GPUs. The copper cable wall at the back of today’s racks gives way to sparse fiber runs and free-space optical links between trays.
- An interconnect that helps run the machine. The 425 spare channels, provisioned for manufacturing yield, become a platform. Erasure coding across the array lets the link absorb individual channel failures silently, with no detection event or interruption. A dedicated optical barrier network is modeled to synchronize a 1,000-GPU row in well under a microsecond, deterministically, removing a synchronization cost that otherwise grows with cluster size. The same channels can distribute precise timing, carry control and telemetry traffic, and let the fabric monitor its own health.
- Lower energy and more freedom in where AI can be built. At approximately one picojoule per bit, the design targets the removal of roughly 75% to 83% of interconnect energy, along with the heat the cooling plant would otherwise remove. Because reach no longer dictates density, operators could spread compute out, extend air cooling and deploy in existing buildings that cannot host 120-kilowatt liquid-cooled racks.
- A path toward building-scale AI. The paper’s longer-term “Cube” concept models approximately 100,000 GPUs organized as about 100 rows of roughly 1,000 GPUs, connected through an optical spine with cross-building latency of about one microsecond. The paper models that the 1.3 to 1.6 times per-GPU gain can hold at that scale, where today’s utilization losses normally grow.
The paper is direct about what must go right, naming six requirements: switch silicon that accepts thousands of parallel optical channels natively, access to GPU and accelerator packages through the open hardware ecosystem, characterization of coded per-channel speed, micron-level optical alignment that holds up in the field, lower-loss glass for building-scale reach, and execution ahead of competing approaches.
Fabric.AI and Kopin have begun initial transmission-link testing of Neural I/o, with a public technology demonstration targeted for January 2027 and first-generation production silicon targeted for 2028.
Performance figures for systems that do not yet exist, including training throughput, utilization, latency, energy per bit and future system architectures, are modeled results based on assumptions detailed in the white paper and are not measured performance results from production systems.
The full white paper, “The Data Center in a SerDes-Free World: From the Copper Wall to the Row — and From the Row to One Machine the Size of a Building,” is available on Kopin’s website at: https://www.kopin.com/the-data-center-in-a-serdes-free-world-lander/.
About Fabric.AI
Fabric.AI, Inc. (Nasdaq: FABC) is a fabless semiconductor company developing MicroLED-based optical interconnects designed to address the data-movement bottleneck in AI data centers. Its Neural I/o™ program is being developed in partnership with Kopin Corporation. For more information, visit www.fabricai.com.
About Kopin Corporation
Kopin Corporation (Nasdaq: KOPN) is a leading developer and provider of innovative display, Optical Interconnect devices and application-specific optical solutions sold as critical components and subassemblies for defense, enterprise, professional and consumer products. Kopin’s portfolio includes microdisplays, display modules, eyepiece assemblies, image projection modules and vehicle mounted and head-mounted display systems that incorporate ultra-small high-resolution Active Matrix Liquid Crystal displays (AMLCD), Ferroelectric Liquid Crystal on Silicon (FLCoS) displays, MicroLED displays (µLED) and Organic Light Emitting Diode (OLED) displays, a variety of optics and low-power ASICs and optical interconnect devices for data centers. For more information, please visit Kopin’s website at www.kopin.com. Kopin is a trademark of Kopin Corporation.
Forward-Looking Statements
This press release contains “forward-looking statements” within the meaning of the federal securities laws, including statements regarding the development, capabilities and performance of the Neural I/o™ interconnect; modeled training throughput, utilization, latency, energy efficiency and system architectures described in the white paper; the anticipated timing and outcome of the planned Neural I/o public demonstration and production silicon; the Company’s partnership with Kopin; and the Company’s strategic priorities and competitive positioning. These statements are based on current expectations and assumptions and are subject to significant risks and uncertainties that could cause actual results to differ materially, including the risk that the Neural I/o demonstration or production silicon is delayed or unsuccessful; that the technology does not achieve the bandwidth, energy-efficiency, latency, reliability or cost advantages it targets; that modeled system-level results described in the white paper are not realized in practice; that switch silicon, packaging, optical alignment or fiber technologies required by the architecture are not developed or adopted; that the Company’s pending patent applications do not result in issued patents or in meaningful protection; that competing technologies achieve similar or better results first; and that the Company requires additional capital to fund its operations. Performance figures referenced herein for systems not yet in production are design targets or architectural models, not measured results of shipping products. A discussion of these and other factors is set forth in the Company’s most recent Annual Report on Form 10-K and subsequent reports filed with the Securities and Exchange Commission. The Company undertakes no obligation to update any forward-looking statement except as required by law.
Neural I/o™ is a trademark of its owner(s). All other trademarks are the property of their respective owners.
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