{"id":989153,"date":"2026-08-04T07:42:38","date_gmt":"2026-08-04T11:42:38","guid":{"rendered":"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/"},"modified":"2026-08-04T07:42:38","modified_gmt":"2026-08-04T11:42:38","slug":"microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure","status":"publish","type":"post","link":"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/","title":{"rendered":"Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe\u00ae Gen 6 Storage Architecture for AI and Data Center Infrastructure"},"content":{"rendered":"<h2>\nSwitchtec\u2122 PCIe Switches and Micron\u00ae 9650 NVMe\u00ae solid state drives (SSDs) leverage next generation interface technology to deliver increased bandwidth, low latency, and scalable storage connectivity<br \/>\n<\/h2>\n<div class=\"mw_release\">\n<p>CHANDLER, Ariz., Aug.  04, 2026  (GLOBE NEWSWIRE) &#8212; Microchip Technology\u00a0<strong>(Nasdaq: MCHP)<\/strong>\u00a0today announced a demonstration showcasing an end\u2011to\u2011end PCIe<sup>\u00ae<\/sup> Gen 6 storage architecture,\u00a0combining Microchip\u2019s Switchtec\u2122 PCIe Gen 6 switches\u00a0with high-performance Micron 9650 NVMe<sup><strong><em>\u00ae<\/em><\/strong><\/sup> solid state drives (SSDs). The demonstration highlights the role of next\u2011generation PCIe technology in enabling higher data throughput, reduced latency and scalable connectivity for AI, high\u2011performance computing (HPC) and cloud data center workloads.<\/p>\n<p>At the 2026 Future of Memory and Storage (FMS) Conference, the demonstration features a Microchip Switchtec Gen 6 PCIe fanout switch\u00a0acting as a high\u2011bandwidth, low\u2011latency interconnect between host processors and multiple Micron 9650 SSDs enabling the drives to operate at the full potential of Gen 6 speed. The architecture supports composable and disaggregated system designs, allowing data center architects to scale storage resources efficiently while maintaining predictable performance.<\/p>\n<p>\u201cAdvancing data center performance is not solved by any single component and our work with Micron highlights the importance of taking a cohesive approach,\u201d said Brian McCarson, corporate vice president and GM of Microchip\u2019s data center solutions business unit. \u201cWe\u2019re bringing together complementary strengths in switching and storage to demonstrate how a well\u2011aligned ecosystem can enable scalable, high\u2011bandwidth architectures for next\u2011generation AI and cloud platforms.\u201d<\/p>\n<p>As AI models grow in size and complexity, data centers must move increasingly large volumes of data across compute, memory and storage resources. PCIe 6.0 helps address this challenge by doubling PCIe 5.0 bandwidth to 64 GT\/s (giga transfers per second) per lane, delivering the sustained throughput required for demanding AI workloads.<\/p>\n<p>\u201cAI infrastructure is entering a new era in which storage performance and ecosystem interoperability must advance in lockstep,\u201d said Larry Hart, senior director of solutions marketing for Micron\u2019s Core Data Center Business Unit. \u201cTogether, the Micron 9650 SSD, the industry\u2019s first mass-produced PCIe Gen 6 SSD, and Microchip\u2019s Switchtec PCIe Gen 6 switching technology demonstrate how a scalable storage architecture can help data centers achieve higher throughput, lower latency and more efficient data movement for next-generation AI, HPC and cloud workloads.\u201d<\/p>\n<p>Microchip&#8217;s Switchtec Gen 6 PCIe switches are built on 3 nm process technology and support high lane counts, advanced error containment, comprehensive diagnostics and multicast functionality that enables efficient one-to-many data distribution across devices within a PCIe domain. The switches enable high-speed connectivity between CPUs, GPUs, SoCs, AI accelerators and storage devices while helping optimize power consumption in demanding computing environments. These capabilities help ensure reliable data movement and system resilience in AI and cloud infrastructure. To help protect system integrity, the switches incorporate a hardware root of trust and secure boot architecture supported by post-quantum-safe cryptographic algorithms that meet CNSA 2.0 security standards.<\/p>\n<p>Micron 9650 PCIe Gen 6 NVMe SSDs are designed to deliver exceptional throughput, IOPS and latency characteristics required for data\u2011intensive workloads such as AI training, real\u2011time analytics and large\u2011scale databases. By combining Micron\u2019s storage technology with Microchip\u2019s switching capability, the solution demonstrates a balanced, high\u2011performance storage fabric optimized for next\u2011generation platforms. Visit the website to learn more about Microchip\u2019s full portfolio of <a href=\"https:\/\/www.microchip.com\/en-us\/solutions\/data-centers-and-computing\/data-center-solutions\" rel=\"nofollow\" target=\"_blank\"><strong>data center solutions<\/strong><\/a>.<\/p>\n<p>\n        <strong>Resources<\/strong><br \/>\n        <br \/>High-res images available through Flickr or editorial contact (feel free to publish):<\/p>\n<ul>\n<li>Application image: <a href=\"https:\/\/www.flickr.com\/gp\/microchiptechnology\/Hogy7Pk3z4\" rel=\"nofollow\" target=\"_blank\"><strong>https:\/\/www.flickr.com\/gp\/microchiptechnology\/Hogy7Pk3z4<\/strong><\/a><\/li>\n<\/ul>\n<p>\n        <strong><br \/>\n          <u><br \/>\n            <br \/>About Microchip Technology<\/u><br \/>\n        <\/strong><br \/>\n        <strong>:<\/strong><br \/>\n        <br \/>Microchip Technology Inc. is a broadline supplier of semiconductors committed to making innovative design easier through total system solutions that address critical challenges at the intersection of emerging technologies and durable end markets. Its easy-to-use development tools and comprehensive product portfolio supports customers throughout the design process, from concept to completion. Headquartered in Chandler, Arizona, Microchip offers outstanding technical support and delivers solutions across the industrial, automotive, consumer, aerospace and defense, communications and computing markets. For more information, visit the Microchip website at <a href=\"http:\/\/www.microchip.com\" rel=\"nofollow\" target=\"_blank\"><strong>www.microchip.com<\/strong><\/a>. <\/p>\n<p>\n        <em>Note: The Microchip name and logo and the Microchip logo are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Switchtec is a trademark of Microchip Technology Inc. in the U.S.A. and other countries. All other trademarks mentioned herein are the property of their respective companies.<\/em>\n      <\/p>\n<table style=\"border-collapse: collapse;width:100%;border-collapse:collapse\">\n<tr>\n<td style=\"vertical-align: top\">\n            <strong>Editorial Contact:<\/strong>\n          <\/td>\n<td style=\"vertical-align: top\">\n            <strong>\u00a0<\/strong>\n          <\/td>\n<\/tr>\n<tr>\n<td style=\"vertical-align: top\">Amber Liptai<\/td>\n<td style=\"vertical-align: top\">\n            <strong>\u00a0<\/strong>\n          <\/td>\n<\/tr>\n<tr>\n<td style=\"vertical-align: top\">480-792-5047<\/td>\n<td style=\"vertical-align: top\">\n            <strong>\u00a0<\/strong>\n          <\/td>\n<\/tr>\n<tr>\n<td style=\"vertical-align: top\">\n            <a href=\"mailto:amber.liptai@microchip.com\" rel=\"nofollow\" target=\"_blank\"><br \/>\n              <strong>amber.liptai@microchip.com<\/strong><br \/>\n            <\/a>\n          <\/td>\n<td style=\"vertical-align: top\">\u00a0<\/td>\n<\/tr>\n<\/table>\n<p>\n        \n      <\/p>\n<p>      <img decoding=\"async\" alt=\"\" class=\"__GNW8366DE3E__IMG\" src=\"https:\/\/www.globenewswire.com\/newsroom\/ti?nf=OTgwMTk1MiM3NzUzNjExIzIwMDQ3NzY=\" \/><br \/>\n      <br \/>\n      <img decoding=\"async\" alt=\"\" src=\"https:\/\/ml.globenewswire.com\/media\/NmEzYmNlMjktMTRmNi00NTQ4LWFjMzktNjY4MGQwYWFkMGY2LTEwMTYzNDktMjAyNi0wOC0wNC1lbg==\/tiny\/Microchip-Technology-Inc-.png\" \/>\n    <\/div>\n<div class=\"mw_contactinfo\"><\/div>\n","protected":false},"excerpt":{"rendered":"<p>Switchtec\u2122 PCIe Switches and Micron\u00ae 9650 NVMe\u00ae solid state drives (SSDs) leverage next generation interface technology to deliver increased bandwidth, low latency, and scalable storage connectivity CHANDLER, Ariz., Aug. 04, 2026 (GLOBE NEWSWIRE) &#8212; Microchip Technology\u00a0(Nasdaq: MCHP)\u00a0today announced a demonstration showcasing an end\u2011to\u2011end PCIe\u00ae Gen 6 storage architecture,\u00a0combining Microchip\u2019s Switchtec\u2122 PCIe Gen 6 switches\u00a0with high-performance Micron 9650 NVMe\u00ae solid state drives (SSDs). The demonstration highlights the role of next\u2011generation PCIe technology in enabling higher data throughput, reduced latency and scalable connectivity for AI, high\u2011performance computing (HPC) and cloud data center workloads. At the 2026 Future of Memory and Storage (FMS) Conference, the demonstration features a Microchip Switchtec Gen 6 PCIe fanout switch\u00a0acting as a high\u2011bandwidth, low\u2011latency interconnect between host processors &hellip; <\/p>\n<p class=\"link-more\"><a href=\"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/\" class=\"more-link\">Continue reading<span class=\"screen-reader-text\"> &#8220;Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe\u00ae Gen 6 Storage Architecture for AI and Data Center Infrastructure&#8221;<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[],"tags":[],"class_list":["post-989153","post","type-post","status-publish","format-standard","hentry"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v28.2 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe\u00ae Gen 6 Storage Architecture for AI and Data Center Infrastructure - Market Newsdesk<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe\u00ae Gen 6 Storage Architecture for AI and Data Center Infrastructure - Market Newsdesk\" \/>\n<meta property=\"og:description\" content=\"Switchtec\u2122 PCIe Switches and Micron\u00ae 9650 NVMe\u00ae solid state drives (SSDs) leverage next generation interface technology to deliver increased bandwidth, low latency, and scalable storage connectivity CHANDLER, Ariz., Aug. 04, 2026 (GLOBE NEWSWIRE) &#8212; Microchip Technology\u00a0(Nasdaq: MCHP)\u00a0today announced a demonstration showcasing an end\u2011to\u2011end PCIe\u00ae Gen 6 storage architecture,\u00a0combining Microchip\u2019s Switchtec\u2122 PCIe Gen 6 switches\u00a0with high-performance Micron 9650 NVMe\u00ae solid state drives (SSDs). The demonstration highlights the role of next\u2011generation PCIe technology in enabling higher data throughput, reduced latency and scalable connectivity for AI, high\u2011performance computing (HPC) and cloud data center workloads. At the 2026 Future of Memory and Storage (FMS) Conference, the demonstration features a Microchip Switchtec Gen 6 PCIe fanout switch\u00a0acting as a high\u2011bandwidth, low\u2011latency interconnect between host processors &hellip; Continue reading &quot;Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe\u00ae Gen 6 Storage Architecture for AI and Data Center Infrastructure&quot;\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/\" \/>\n<meta property=\"og:site_name\" content=\"Market Newsdesk\" \/>\n<meta property=\"article:published_time\" content=\"2026-08-04T11:42:38+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.globenewswire.com\/newsroom\/ti?nf=OTgwMTk1MiM3NzUzNjExIzIwMDQ3NzY=\" \/>\n<meta name=\"author\" content=\"Newsdesk\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"Newsdesk\" \/>\n\t<meta name=\"twitter:label2\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data2\" content=\"4 minutes\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\\\/#article\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\\\/\"},\"author\":{\"name\":\"Newsdesk\",\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/#\\\/schema\\\/person\\\/482f27a394d4fda80ecb5499e519d979\"},\"headline\":\"Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe\u00ae Gen 6 Storage Architecture for AI and Data Center Infrastructure\",\"datePublished\":\"2026-08-04T11:42:38+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\\\/\"},\"wordCount\":729,\"image\":{\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/www.globenewswire.com\\\/newsroom\\\/ti?nf=OTgwMTk1MiM3NzUzNjExIzIwMDQ3NzY=\",\"inLanguage\":\"en-US\"},{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\\\/\",\"url\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\\\/\",\"name\":\"Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe\u00ae Gen 6 Storage Architecture for AI and Data Center Infrastructure - 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The demonstration highlights the role of next\u2011generation PCIe technology in enabling higher data throughput, reduced latency and scalable connectivity for AI, high\u2011performance computing (HPC) and cloud data center workloads. At the 2026 Future of Memory and Storage (FMS) Conference, the demonstration features a Microchip Switchtec Gen 6 PCIe fanout switch\u00a0acting as a high\u2011bandwidth, low\u2011latency interconnect between host processors &hellip; Continue reading \"Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe\u00ae Gen 6 Storage Architecture for AI and Data Center Infrastructure\"","og_url":"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/","og_site_name":"Market Newsdesk","article_published_time":"2026-08-04T11:42:38+00:00","og_image":[{"url":"https:\/\/www.globenewswire.com\/newsroom\/ti?nf=OTgwMTk1MiM3NzUzNjExIzIwMDQ3NzY=","type":"","width":"","height":""}],"author":"Newsdesk","twitter_card":"summary_large_image","twitter_misc":{"Written by":"Newsdesk","Est. reading time":"4 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/#article","isPartOf":{"@id":"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/"},"author":{"name":"Newsdesk","@id":"https:\/\/www.marketnewsdesk.com\/#\/schema\/person\/482f27a394d4fda80ecb5499e519d979"},"headline":"Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe\u00ae Gen 6 Storage Architecture for AI and Data Center Infrastructure","datePublished":"2026-08-04T11:42:38+00:00","mainEntityOfPage":{"@id":"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/"},"wordCount":729,"image":{"@id":"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/#primaryimage"},"thumbnailUrl":"https:\/\/www.globenewswire.com\/newsroom\/ti?nf=OTgwMTk1MiM3NzUzNjExIzIwMDQ3NzY=","inLanguage":"en-US"},{"@type":"WebPage","@id":"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/","url":"https:\/\/www.marketnewsdesk.com\/index.php\/microchip-technology-in-collaboration-with-micron-technology-demonstrates-high-performance-pcie-gen-6-storage-architecture-for-ai-and-data-center-infrastructure\/","name":"Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe\u00ae Gen 6 Storage Architecture for AI and Data Center Infrastructure - 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