{"id":977239,"date":"2026-06-30T11:05:52","date_gmt":"2026-06-30T15:05:52","guid":{"rendered":"https:\/\/www.marketnewsdesk.com\/index.php\/keysight-and-win-semiconductors-collaborate-to-cut-design-risk-for-high-frequency-rf-components\/"},"modified":"2026-06-30T11:05:52","modified_gmt":"2026-06-30T15:05:52","slug":"keysight-and-win-semiconductors-collaborate-to-cut-design-risk-for-high-frequency-rf-components","status":"publish","type":"post","link":"https:\/\/www.marketnewsdesk.com\/index.php\/keysight-and-win-semiconductors-collaborate-to-cut-design-risk-for-high-frequency-rf-components\/","title":{"rendered":"Keysight and WIN Semiconductors Collaborate to Cut Design Risk for High Frequency RF Components"},"content":{"rendered":"

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Keysight and WIN Semiconductors Collaborate to Cut Design Risk for High Frequency RF Components<\/b><\/p>\n

New GaN MMIC design workflow reduces fabrication risk for 5G, satellite and defense applications<\/i><\/p>\n

SANTA ROSA, Calif.–(BUSINESS WIRE<\/a>)–Keysight Technologies, Inc.<\/a> (NYSE: KEYS) and WIN Semiconductors Corp. today announced a joint MMIC design workflow that enables GaN MMIC design houses to achieve first pass tapeout success. The workflow connects on-chip multi-domain simulation, 3D layout with verifications, and off-chip MMIC evaluation board design into a single environment. It supports the growing number of companies developing GaN MMICs for 5G base stations, Wi-Fi access points, satellite payloads, and defense radar systems.<\/p>\n

\nA failed tapeout can mean weeks lost to another foundry respin. The new workflow automates the full set of simulation, optimization, and verification steps required to sign off on an MMIC design, ensuring no analysis is skipped before the design is submitted to the foundry for fabrication.<\/p>\n

\nMMIC customers will not commit to purchase until they can measure performance on a physical evaluation board comprising the MMIC, packaging, PCB, and test connectors. The workflow lets engineers design and optimize these on-chip and off-chip components together, so that performance meets specifications as verified with test equipment. With the global GaN RF device market projected to reach $2.77 billion by 2031<\/a>, MMIC design houses that cannot prove performance on the evaluation board risk losing their share of that growth.<\/p>\n

\nWIN Semiconductors\u2019 latest NP 120P GaN Process Design Kit gives MMIC designers access to process models and layout rules. These models within Keysight Advanced Design System (ADS) and RF Circuit Simulation Professional automate the workflow to achieve first pass MMIC tapeout.<\/p>\n

Richard Kuo, Director of Design Service, WIN Semiconductors, said: <\/b>\u201cWe are delighted to collaborate with Keysight to deliver a customized LVS solution within the WIN ADS PDK. By combining Keysight’s ADS expertise with WIN’s robust PDK and advanced process technology, we provided a comprehensive verification solution that streamlined the customer’s design flow and accelerated the time-to-market for advanced RF products with greater confidence and reliability.\u201d<\/p>\n

Nilesh Kamdar, General Manager, EDA, Design Engineering Software, Keysight, said: <\/b>\u201cWIN’s complete PDK, combined with Keysight’s simulation and verification tools, gives designers a single path from chip design through evaluation board. Design houses can now prove full system performance before fabrication, giving their customers the confidence to commit.\u201d<\/p>\n

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