{"id":926875,"date":"2026-01-13T09:25:18","date_gmt":"2026-01-13T14:25:18","guid":{"rendered":"https:\/\/www.marketnewsdesk.com\/index.php\/cadence-delivers-enterprise-level-reliability-with-next-gen-low-power-dram-for-ai-applications-featuring-microsoft-raiddr-ecc-technology\/"},"modified":"2026-01-13T09:25:18","modified_gmt":"2026-01-13T14:25:18","slug":"cadence-delivers-enterprise-level-reliability-with-next-gen-low-power-dram-for-ai-applications-featuring-microsoft-raiddr-ecc-technology","status":"publish","type":"post","link":"https:\/\/www.marketnewsdesk.com\/index.php\/cadence-delivers-enterprise-level-reliability-with-next-gen-low-power-dram-for-ai-applications-featuring-microsoft-raiddr-ecc-technology\/","title":{"rendered":"Cadence Delivers Enterprise-Level Reliability with Next-Gen Low-Power DRAM for AI Applications Featuring Microsoft RAIDDR ECC Technology"},"content":{"rendered":"

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Cadence Delivers Enterprise-Level Reliability with Next-Gen Low-Power DRAM for AI Applications Featuring Microsoft RAIDDR ECC Technology<\/b><\/p>\n

Industry-first LPDDR5X IP system solution designed specifically for data centers utilizes RAIDDR ECC algorithm<\/i><\/p>\n

SAN JOSE, Calif.–(BUSINESS WIRE<\/a>)–
\nCadence (Nasdaq: CDNS) today announced the industry\u2019s first LPDDR5X 9600Mbps memory IP system solution designed specifically for enterprise and data center applications with high reliability. This innovative solution integrates Cadence\u2019s production-proven LPDDR5X IP and Microsoft\u2019s advanced redundant array of independent double data rate (RAIDDR) error correction code (ECC) coding schema, delivering a powerful combination of high performance, low power consumption and robust reliability. Microsoft is the first customer to deploy the new system solution.<\/p>\n

\nIn the AI infrastructure build-out, LPDDR5X is gaining traction in the data center due to its ability to boost energy efficiency and performance for AI, HPC and other memory-intensive workloads. While LPDDR5X-based systems reduce power consumption and run times, hyperscalers have until now faced a tradeoff between power, performance and area (PPA) and the reliability, availability and serviceability (RAS) offered by DDR5 memory.<\/p>\n

\nBuilt on LPDDR5X DRAM technology, the new memory IP system solution enables enterprise RAS capabilities while maintaining PPA in a compact form factor. The solution supports up to 9600Mbps data rates and offers sideband ECC performance comparable to traditional DDR5 ECC implementations, making it ideal for data center applications.<\/p>\n

\nAt the core of the solution is Microsoft\u2019s RAIDDR ECC coding schema\u2014a next-generation error correction algorithm that achieves close to single device data correction (SDDC), providing industry-leading accuracy and fault detection with minimal logic overhead. RAIDDR offers protection equivalent to symbol-based ECC, traditionally associated with DDR5 RDIMM-based applications.<\/p>\n

Key features of the new memory system solution include:<\/b><\/p>\n