{"id":911136,"date":"2025-11-18T07:30:18","date_gmt":"2025-11-18T12:30:18","guid":{"rendered":"https:\/\/www.marketnewsdesk.com\/index.php\/quicklogic-efpga-hard-ip-selected-by-chipus-for-12-nm-high-performance-data-center-asic\/"},"modified":"2025-11-18T07:30:18","modified_gmt":"2025-11-18T12:30:18","slug":"quicklogic-efpga-hard-ip-selected-by-chipus-for-12-nm-high-performance-data-center-asic","status":"publish","type":"post","link":"https:\/\/www.marketnewsdesk.com\/index.php\/quicklogic-efpga-hard-ip-selected-by-chipus-for-12-nm-high-performance-data-center-asic\/","title":{"rendered":"QuickLogic eFPGA Hard IP Selected by Chipus for 12 nm High Performance Data Center ASIC"},"content":{"rendered":"
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PR Newswire<\/p>\n<\/p><\/div>\n

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\n Selection underscores QuickLogic’s ability to deliver flexible, silicon-proven IP that reduces ASIC<\/span> risk and shortens design cycles for commercial applications<\/i>\n <\/p>\n

\n
\n SAN JOSE, Calif.<\/span>
\n <\/span>, Nov. 18, 2025<\/span><\/span> \/PRNewswire\/ –\u202fQuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP and ruggedized FPGAs, announced today that its eFPGA Hard IP was selected by Chipus for a high performance data center production ASIC<\/span> that will be fabricated on an industry-proven 12 nm process technology. \u00a0eFPGA IP was a central requirement for this high-performance ASIC<\/span> and underscores how QuickLogic’s silicon-proven IP helps customers reduce design risk, accelerate schedules, and deliver competitive products to market.<\/p>\n

\n

\n
\n \"QuickLogic
\n <\/a>\n <\/p>\n<\/p><\/div>\n

QuickLogic worked closely with Chipus and its customer to ensure the eFPGA met strict performance and connectivity requirements while optimizing the fabric to minimize silicon area.<\/p>\n

QuickLogic can deliver eFPGA Hard IP<\/a> on any new process node within four to six months, supporting applications from high-performance data processing to low-power, battery-operated devices. Once a fab-specific Hard IP is established, customer-specific variants can be delivered in just weeks, enabled by QuickLogic’s proprietary Australis IP Generator. QuickLogic eFPGA IP is supported by two FPGA tool suites: Aurora, a 100% open-source version, and Aurora Pro<\/span>, which integrates Synopsys\u00ae Synplify\u00ae FPGA Logic Synthesis.<\/p>\n

“When our customer stated they needed eFPGA as a key IP in their ASIC<\/span>, we decided to partner with QuickLogic because of more than 30 years of FPGA expertise and adoption throughout the aerospace and defense community,” said Murilo Pessatti, CEO of Chipus. “They have been instrumental in working with us and our customer to right-size the eFPGA fabric, helping us deliver a competitive, reliable ASIC<\/span> to market more quickly and with reduced risk.”<\/p>\n

“We are excited to be partnering with\u00a0Chipus on this ASIC<\/span> which is a testament that eFPGA IP is becoming more critical IP for system companies,” said Andy Jaros<\/span>, VP of IP Sales at QuickLogic. “With our eFPGA Hard IP proven in many process nodes and used by many commercial and defense customers, we’re able to deliver customer-specific variants quickly, reducing development risk and enabling ongoing product differentiation through reprogrammability.”<\/p>\n

For more information on QuickLogic’s eFPGA IP licensing and other solutions, please visit www.quicklogic.com<\/a>.<\/p>\n

\n About\u00a0Chipus<\/b>
\n
Chipus Microelectronics (ISO 9001:2015) is a fabless semiconductor design house specializing in mixed-signal turnkey ASICs, IP blocks, and IC design services. We offer 300+ silicon-proven IPs across multiple foundries and nodes\u2014from mature planar CMOS\/BiCMOS\/SiGe\/BCD to FinFET\u2014and have supported customers worldwide since 2008. Our turnkey scope spans system architecture, RTL, synthesis, timing closure, verification, physical sign-off, tape-out, packaging, and test, delivering fully tested parts. Headquartered in Florian\u00f3polis, Brazil<\/span>, Chipus has a U.S. subsidiary in Silicon Valley and sales teams in the U.S., Europe<\/span>, and Asia<\/span>. For more information, visit www.chipus-ip.com<\/a>.<\/p>\n

\n About QuickLogic<\/b>\u00a0
QuickLogic Corporation is a fabless semiconductor company specializing in eFPGA Hard IP, discrete FPGAs, and endpoint AI solutions. QuickLogic’s unique approach combines cutting-edge technology with open-source tools to deliver highly customizable, low-power solutions for industrial, aerospace, consumer, and computing markets. For more information, visit www.quicklogic.com<\/a>.\u00a0<\/p>\n

\n QuickLogic and logo are registered trademarks of QuickLogic. All other trademarks are the property of their respective holders and should be treated as such.<\/i>\n <\/p>\n

\u00a0<\/p>\n

\n \"Cision\" View original content to download multimedia:https:\/\/www.prnewswire.com\/news-releases\/quicklogic-efpga-hard-ip-selected-by-chipus-for-12-nm-high-performance-data-center-asic-302618220.html<\/a><\/p>\n

SOURCE QuickLogic Corporation<\/p>\n<\/p><\/div>\n

\"\"<\/p>\n","protected":false},"excerpt":{"rendered":"

PR Newswire Selection underscores QuickLogic’s ability to deliver flexible, silicon-proven IP that reduces ASIC risk and shortens design cycles for commercial applications SAN JOSE, Calif. , Nov. 18, 2025 \/PRNewswire\/ –\u202fQuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP and ruggedized FPGAs, announced today that its eFPGA Hard IP was selected by Chipus for a high performance data center production ASIC that will be fabricated on an industry-proven 12 nm process technology. \u00a0eFPGA IP was a central requirement for this high-performance ASIC and underscores how QuickLogic’s silicon-proven IP helps customers reduce design risk, accelerate schedules, and deliver competitive products to market. QuickLogic worked closely with Chipus and its customer to ensure the eFPGA met strict performance and … <\/p>\n

Continue reading “QuickLogic eFPGA Hard IP Selected by Chipus for 12 nm High Performance Data Center ASIC”<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[],"tags":[],"class_list":["post-911136","post","type-post","status-publish","format-standard","hentry"],"yoast_head":"\nQuickLogic eFPGA Hard IP Selected by Chipus for 12 nm High Performance Data Center ASIC - Market Newsdesk<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.marketnewsdesk.com\/index.php\/quicklogic-efpga-hard-ip-selected-by-chipus-for-12-nm-high-performance-data-center-asic\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"QuickLogic eFPGA Hard IP Selected by Chipus for 12 nm High Performance Data Center ASIC - Market Newsdesk\" \/>\n<meta property=\"og:description\" content=\"PR Newswire Selection underscores QuickLogic’s ability to deliver flexible, silicon-proven IP that reduces ASIC risk and shortens design cycles for commercial applications SAN JOSE, Calif. , Nov. 18, 2025 \/PRNewswire\/ –\u202fQuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP and ruggedized FPGAs, announced today that its eFPGA Hard IP was selected by Chipus for a high performance data center production ASIC that will be fabricated on an industry-proven 12 nm process technology. \u00a0eFPGA IP was a central requirement for this high-performance ASIC and underscores how QuickLogic’s silicon-proven IP helps customers reduce design risk, accelerate schedules, and deliver competitive products to market. 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