{"id":839461,"date":"2025-04-21T10:48:56","date_gmt":"2025-04-21T14:48:56","guid":{"rendered":"https:\/\/www.marketnewsdesk.com\/index.php\/cadence-advances-ai-in-the-cloud-with-industry-first-ddr5-12-8gbps-mrdimm-gen2-memory-ip-system-solution\/"},"modified":"2025-04-21T10:48:56","modified_gmt":"2025-04-21T14:48:56","slug":"cadence-advances-ai-in-the-cloud-with-industry-first-ddr5-12-8gbps-mrdimm-gen2-memory-ip-system-solution","status":"publish","type":"post","link":"https:\/\/www.marketnewsdesk.com\/index.php\/cadence-advances-ai-in-the-cloud-with-industry-first-ddr5-12-8gbps-mrdimm-gen2-memory-ip-system-solution\/","title":{"rendered":"Cadence Advances AI in the Cloud with Industry-First DDR5 12.8Gbps MRDIMM Gen2 Memory IP System Solution"},"content":{"rendered":"

<\/p>\n

Cadence Advances AI in the Cloud with Industry-First DDR5 12.8Gbps MRDIMM Gen2 Memory IP System Solution<\/b><\/p>\n

High-performance data center and enterprise memory solution available now for customer engagements<\/i><\/p>\n

SAN JOSE, Calif.–(BUSINESS WIRE<\/a>)–
\nCadence (Nasdaq: CDNS) today announced the industry\u2019s first DDR5 12.8Gbps MRDIMM Gen2 memory IP system solution on the TSMC N3 process. The new solution addresses the need for greater memory bandwidth to accommodate unprecedented AI processing demands in enterprise and data center applications, including AI in the cloud. The Cadence\u00ae<\/sup> DDR5 MRDIMM IP boasts a new high-performance, scalable and adaptable architecture based on Cadence\u2019s proven and highly successful DDR5 and GDDR6 product lines. With multiple engagements underway with leading AI, HPC and data center customers, this IP solution is already demonstrating its early leadership.\n<\/p>\n

This press release features multimedia. View the full release here: https:\/\/www.businesswire.com\/news\/home\/20250421736348\/en\/<\/a><\/p>\n

\"The<\/p>\n

The Cadence DDR5 MRDIMM IP design is validated in hardware using the most recently available MRDIMMs (Gen2), achieving a best-in-class 12.8Gbps data rate that doubles the bandwidth using current DDR5 6400Mbps DRAM parts.<\/p>\n<\/div>\n

\nThe new Cadence DDR5 IP offers a PHY and a high-performance controller as a complete memory subsystem. The design is validated in hardware using the most recently available MRDIMMs (Gen2), achieving a best-in-class 12.8Gbps data rate that doubles the bandwidth using current DDR5 6400Mbps DRAM parts. The DDR5 IP memory subsystem is based on Cadence\u2019s silicon-proven, high-performance architecture, ultra-low latency encryption and industry-leading RAS features. The DDR5 MRDIMM Gen2 IP is designed to enable advanced SoCs and chiplets with flexible floorplan design options, while the new architecture allows fine-tuning of power and performance based on individual application requirements.\n<\/p>\n

\n\u201cThe Cadence DDR5 IP portfolio, together with Micron\u2019s industry-leading 1\u03b3 (1-gamma)-based DRAM, meets the increasing demand for higher memory bandwidth, density and reliability for AI processing workloads. These memory enhancements are pivotal in enabling the next generation AI\/ML and HPC applications in data center and enterprise environments,\u201d said Praveen Vaidyanathan, vice president and general manager of Micron\u2019s Data Center Products.\n<\/p>\n

\n\u201cCadence\u2019s DDR5 MRDIMM IP system solution, paired with MRDIMM modules featuring Montage\u2019s memory buffers, delivers a high-performance memory subsystem for next-generation servers with doubled bandwidth,\u201d said Stephen Tai, president at Montage Technology. \u201cMontage\u2019s MRCD02\/MDB02 chips for MRDIMMs, capable of blazing 12.8Gbps data rates, are ready to enable server and data center products.\u201d\n<\/p>\n

\n\u201cData center and enterprise applications stand to gain a significant performance advantage from Cadence\u2019s DDR5 12.8Gbps MRDIMM IP system solution, as evidenced by large customers turning to Cadence to deliver this innovative technology,\u201d said Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence. \u201cThis new leading-edge memory IP system both raises the bar and establishes a roadmap that future-proofs our customers\u2019 next-generation SoC and chiplet products for generations to come.\u201d\n<\/p>\n

\nCadence\u2019s DDR5 controller and PHY have been verified with Cadence\u2019s Verification IP (VIP) for DDR to provide rapid IP and SoC verification closure. Cadence VIP for DDR5 includes a complete solution from IP to system-level verification with DFI VIP, DDR5 memory model and System Performance Analyzer.\n<\/p>\n

\nFor more information on the new solution, visit the Cadence DDR5 MRDIMM PHY and controller page<\/a>.\n<\/p>\n

About Cadence<\/b><\/p>\n

\nCadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence\u2019s Intelligent System Design\u2122<\/sup> strategy, are essential for the world\u2019s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world\u2019s top 100 best-managed companies. Cadence solutions offer limitless opportunities\u2014learn more at www.cadence.com<\/a>.\n<\/p>\n

\u00a9 2025 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at <\/i>www.cadence.com\/go\/trademarks<\/i><\/a> are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.<\/i><\/p>\n

\nCategory: Featured\n<\/p>\n

\"\"<\/p>\n

View source version on businesswire.com: <\/span>https:\/\/www.businesswire.com\/news\/home\/20250421736348\/en\/<\/a><\/span><\/p>\n

\nFor more information, please contact:
\n
Cadence Newsroom
\n
408-944-7039
\n
newsroom@cadence.com<\/a><\/p>\n

KEYWORDS:<\/b> United States North America California<\/p>\n

INDUSTRY KEYWORDS:<\/b> Technology Semiconductor Engineering Software Manufacturing Networks Hardware Electronic Design Automation Data Management Artificial Intelligence<\/p>\n

MEDIA:<\/b><\/p>\n\n\n\n\n\n\n\n
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The Cadence DDR5 MRDIMM IP design is validated in hardware using the most recently available MRDIMMs (Gen2), achieving a best-in-class 12.8Gbps data rate that doubles the bandwidth using current DDR5 6400Mbps DRAM parts.<\/font><\/td>\n<\/tr>\n
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Cadence Advances AI in the Cloud with Industry-First DDR5 12.8Gbps MRDIMM Gen2 Memory IP System Solution High-performance data center and enterprise memory solution available now for customer engagements SAN JOSE, Calif.–(BUSINESS WIRE)– Cadence (Nasdaq: CDNS) today announced the industry\u2019s first DDR5 12.8Gbps MRDIMM Gen2 memory IP system solution on the TSMC N3 process. The new solution addresses the need for greater memory bandwidth to accommodate unprecedented AI processing demands in enterprise and data center applications, including AI in the cloud. The Cadence\u00ae DDR5 MRDIMM IP boasts a new high-performance, scalable and adaptable architecture based on Cadence\u2019s proven and highly successful DDR5 and GDDR6 product lines. With multiple engagements underway with leading AI, HPC and data center customers, this IP solution … <\/p>\n

Continue reading “Cadence Advances AI in the Cloud with Industry-First DDR5 12.8Gbps MRDIMM Gen2 Memory IP System Solution”<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[],"tags":[],"class_list":["post-839461","post","type-post","status-publish","format-standard","hentry"],"yoast_head":"\nCadence Advances AI in the Cloud with Industry-First DDR5 12.8Gbps MRDIMM Gen2 Memory IP System Solution - Market Newsdesk<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.marketnewsdesk.com\/index.php\/cadence-advances-ai-in-the-cloud-with-industry-first-ddr5-12-8gbps-mrdimm-gen2-memory-ip-system-solution\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Cadence Advances AI in the Cloud with Industry-First DDR5 12.8Gbps MRDIMM Gen2 Memory IP System Solution - Market Newsdesk\" \/>\n<meta property=\"og:description\" content=\"Cadence Advances AI in the Cloud with Industry-First DDR5 12.8Gbps MRDIMM Gen2 Memory IP System Solution High-performance data center and enterprise memory solution available now for customer engagements SAN JOSE, Calif.–(BUSINESS WIRE)– Cadence (Nasdaq: CDNS) today announced the industry\u2019s first DDR5 12.8Gbps MRDIMM Gen2 memory IP system solution on the TSMC N3 process. The new solution addresses the need for greater memory bandwidth to accommodate unprecedented AI processing demands in enterprise and data center applications, including AI in the cloud. The Cadence\u00ae DDR5 MRDIMM IP boasts a new high-performance, scalable and adaptable architecture based on Cadence\u2019s proven and highly successful DDR5 and GDDR6 product lines. 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The new solution addresses the need for greater memory bandwidth to accommodate unprecedented AI processing demands in enterprise and data center applications, including AI in the cloud. The Cadence\u00ae DDR5 MRDIMM IP boasts a new high-performance, scalable and adaptable architecture based on Cadence\u2019s proven and highly successful DDR5 and GDDR6 product lines. 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