{"id":820638,"date":"2025-03-03T09:08:22","date_gmt":"2025-03-03T14:08:22","guid":{"rendered":"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/"},"modified":"2025-03-03T09:08:22","modified_gmt":"2025-03-03T14:08:22","slug":"marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure","status":"publish","type":"post","link":"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/","title":{"rendered":"Marvell Demonstrates Industry&#8217;s Leading 2nm Silicon for Accelerated Infrastructure"},"content":{"rendered":"<div class=\"xn-newslines\">\n<p class=\"xn-distributor\">PR Newswire<\/p>\n<\/p><\/div>\n<div class=\"xn-content\">\n<ul type=\"disc\">\n<li>\n          <i>The Marvell\u00ae 2nm platform will enable hyperscalers to dramatically boost the performance and efficiency of their infrastructure to meet the performance and efficiency demands of the AI era.<\/i>\n        <\/li>\n<li>\n          <i>Built on TSMC&#8217;s 2nm process,<\/i><br \/>\n          <i>the silicon is a critical part of the Marvell platform for developing next-generation custom AI accelerators, CPUs, and <\/i><br \/>\n          <i>networking.<\/i>\n        <\/li>\n<li>\n          <i>The silicon IP includes high-speed 3D I\/O for vertically stacking die inside chiplets. <\/i>\n        <\/li>\n<\/ul>\n<p>\n        <span class=\"legendSpanClass\"><br \/>\n          <span class=\"xn-location\">SANTA CLARA, Calif.<\/span><br \/>\n        <\/span>, <span class=\"legendSpanClass\"><span class=\"xn-chron\">March 3, 2025<\/span><\/span> \/PRNewswire\/ &#8212;\u00a0<a href=\"https:\/\/www.marvell.com\/\" target=\"_blank\" rel=\"nofollow\">Marvell Technology, Inc.<\/a> (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions,\u00a0has demonstrated its\u00a0first 2nm silicon IP for next-generation AI and cloud infrastructure. Produced on TSMC&#8217;s 2nm process, the working silicon is part of the Marvell platform for developing custom XPUs, switches and other technology to help cloud service providers elevate the performance, efficiency, and economic potential of their worldwide operations.<\/p>\n<p>Given a projected 45% TAM growth annually, custom silicon is expected to account for approximately 25% of the market for accelerated compute by 2028<sup>1<\/sup>.<\/p>\n<p>\n        <b>A Building Block Approach<\/b>\n      <\/p>\n<p>The Marvell platform strategy centers around developing a comprehensive portfolio of semiconductor IP\u2014including electrical and optical serializer\/deserializers (SerDes), die-to-die interconnects for 2D and 3D devices, advanced packaging technologies, silicon photonics, custom high-bandwidth memory (HBM) compute architecture, on-chip static random-access memory (SRAM), system-on-chip (SoC) fabrics, and compute fabric interfaces such as PCIe Gen 7\u2014that serve as building blocks for developing custom AI accelerators, CPUs, optical DSPs, high-performance switches and other technologies.<\/p>\n<p>\n        <b>Advanced Technology Leadership<\/b>\n      <\/p>\n<p>Starting with the launch of the <a href=\"https:\/\/www.marvell.com\/company\/newsroom\/marvell-tsmc-collaborate-most-advanced-data-infrastructure-portfolio-5nm-technology.html\" target=\"_blank\" rel=\"nofollow\">industry&#8217;s leading\u00a05nm data infrastructure silicon platform<\/a>\u00a0in 2020, Marvell has been at the forefront of developing products produced on advanced technology nodes to market. Marvell announced the industry&#8217;s leading\u00a03nm platform in 2022, with <a href=\"https:\/\/www.marvell.com\/company\/newsroom\/marvell-demonstrates-industrys-first-3nm-data-infrastructure-silicon.html\" target=\"_blank\" rel=\"nofollow\">first silicon produced in 2023<\/a>\u00a0and <a href=\"https:\/\/www.marvell.com\/company\/newsroom\/marvell-unveils-industrys-first-3nm-1-6tbps-pam4-interconnect-platform.html\" target=\"_blank\" rel=\"nofollow\">multiple industry standard and custom silicon products now shipping and in development<\/a>.<\/p>\n<p>&#8220;The platform approach enables us to accelerate the development of market-leading high-speed SerDes and other critical technologies on the latest process manufacturing nodes, which in turn enables Marvell and its customers to accelerate the development of XPUs and other accelerated infrastructure technologies,&#8221; said <span class=\"xn-person\">Sandeep Bharathi<\/span>, chief development officer at Marvell. &#8220;Our longstanding collaboration with TSMC plays a pivotal role in helping Marvell develop complex silicon solutions with industry-leading performance, transistor density and efficiency.&#8221;<\/p>\n<p>\n        <b>New on the Marvell 2nm Platform<\/b>\n      <\/p>\n<p>Additionally, Marvell delivered a 3D simultaneous bi-directional I\/O operating at speeds up to 6.4 Gbits\/second for connecting vertically stacked die inside of chiplets. Today, the I\/O pathways connecting stacks of die are typically unidirectional. Shifting to a bi-directional I\/O gives designers the ability to increase bandwidth by up to two times and\/or reduce the number of connections by 50%.<\/p>\n<p>3D simultaneous bi-directional I\/O will also give chip designers greater flexibility in design. Today&#8217;s most advanced chips exceed the size of the reticle, or photomask, for outlining transistor patterns onto silicon. To increase transistor count, an estimated 30% of all advanced node processors are expected to be based around chiplet designs, where multiple chips are combined into the same package<sup>2<\/sup>. With 3D simultaneous bi-directional I\/O, designers will be able to combine more die into increasingly taller stacks for 2.5D, 3D and 3.5D devices that provide more capabilities than a traditional monolithic silicon device while still functioning like a single device.<\/p>\n<p>&#8220;TSMC is pleased to collaborate with Marvell on the development of its 2nm platform and the delivery of its first silicon,&#8221; said Dr. <span class=\"xn-person\">Kevin Zhang<\/span>, senior vice president of business development\u00a0and global sales, and deputy co-chief operating officer\u00a0at TSMC. &#8220;We look forward to our continued collaboration with Marvell to utilize TSMC&#8217;s best-in-class silicon technology process and packaging technologies to advance accelerated infrastructure for the AI era.&#8221;<\/p>\n<p>\n        <b>About Marvell<\/b>\n      <\/p>\n<p>To deliver the data infrastructure technology that connects the world, we&#8217;re building solutions on the most powerful foundation: our partnerships with our customers. Trusted by the world&#8217;s leading technology companies for over 25 years, we move, store, process and secure the world&#8217;s data with semiconductor solutions designed for our customers&#8217; current needs and future ambitions. Through a process of deep collaboration and transparency, we&#8217;re ultimately changing the way tomorrow&#8217;s enterprise, cloud, automotive, and carrier architectures transform\u2014for the better.<\/p>\n<p>Marvell and the M logo are trademarks of Marvell or its affiliates. Please visit <a href=\"http:\/\/www.marvell.com\" rel=\"nofollow\">www.marvell.com<\/a> for a complete list of Marvell trademarks. Other names and brands may be claimed as the property of others.<\/p>\n<p>This press release contains forward-looking statements within the meaning of the federal securities laws that involve risks and uncertainties. Forward-looking statements include, without limitation, any statement that may predict, forecast, indicate or imply future events, results or achievements. Actual events, results or achievements may differ materially from those contemplated in this press release. Forward-looking statements are only predictions and are subject to risks, uncertainties and assumptions that are difficult to predict, including those described in the &#8220;Risk Factors&#8221; section of our Annual Reports on Form 10-K, Quarterly Reports on Form 10-Q and other documents filed by us from time to time with the SEC. Forward-looking statements speak only as of the date they are made. Readers are cautioned not to put undue reliance on forward-looking statements, and no person assumes any obligation to update or revise any such forward-looking statements, whether as a result of new information, future events or otherwise.<\/p>\n<p>\n        <sup>1.<\/sup><br \/>\n        <a href=\"https:\/\/www.marvell.com\/company\/events\/ai-era-event.html?utm_source=social&amp;utm_medium=event&amp;utm_campaign=aiday-2024\" target=\"_blank\" rel=\"nofollow\">Marvell IA Day, <span class=\"xn-chron\">May 2024<\/span>.<\/a>\n      <\/p>\n<p>\n        <sup>2.<\/sup> Semiconductor Digest and Gartner, <a href=\"https:\/\/www.semiconductor-digest.com\/why-chiplet-based-architecture-is-the-next-frontier-in-semiconductors\/\" target=\"_blank\" rel=\"nofollow\"><span class=\"xn-chron\">December 2024<\/span><\/a>.<\/p>\n<p>\n        <b>For further information, contact:<\/b><br \/>\n        <br \/>\n        <a href=\"mailto:pr@marvell.com\" rel=\"nofollow\">pr@marvell.com<\/a>\n      <\/p>\n<div class=\"PRN_ImbeddedAssetReference\" id=\"DivAssetPlaceHolder6887\">\n<p>\n          <a href=\"https:\/\/mma.prnewswire.com\/media\/356222\/marvell_logo.html\" target=\"_blank\" rel=\"nofollow\"><br \/>\n            <img decoding=\"async\" src=\"https:\/\/mma.prnewswire.com\/media\/356222\/marvell_logo.jpg\" title=\"Essential technology, done right (PRNewsfoto\/Marvell Technology Group Ltd.)\" alt=\"Essential technology, done right (PRNewsfoto\/Marvell Technology Group Ltd.)\" \/><br \/>\n          <\/a>\n        <\/p>\n<\/p><\/div>\n<p>\u00a0<\/p>\n<div class=\"PRN_ImbeddedAssetReference\" id=\"DivAssetPlaceHolder0\"><\/div>\n<p id=\"PURL\">\n        <img loading=\"lazy\" decoding=\"async\" title=\"Cision\" width=\"12\" height=\"12\" alt=\"Cision\" src=\"https:\/\/c212.net\/c\/img\/favicon.png?sn=SF30691&amp;sd=2025-03-03\" \/> View original content to download multimedia:<a id=\"PRNURL\" rel=\"nofollow\" href=\"https:\/\/www.prnewswire.com\/news-releases\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure-302389630.html\" target=\"_blank\">https:\/\/www.prnewswire.com\/news-releases\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure-302389630.html<\/a><\/p>\n<p>SOURCE  Marvell<\/p>\n<\/p><\/div>\n<p>    <img decoding=\"async\" alt=\"\" src=\"https:\/\/rt.prnewswire.com\/rt.gif?NewsItemId=SF30691&amp;Transmission_Id=202503030900PR_NEWS_USPR_____SF30691&amp;DateId=20250303\" style=\"border:0px;width:1px;height:1px\" \/><\/p>\n","protected":false},"excerpt":{"rendered":"<p>PR Newswire The Marvell\u00ae 2nm platform will enable hyperscalers to dramatically boost the performance and efficiency of their infrastructure to meet the performance and efficiency demands of the AI era. Built on TSMC&#8217;s 2nm process, the silicon is a critical part of the Marvell platform for developing next-generation custom AI accelerators, CPUs, and networking. The silicon IP includes high-speed 3D I\/O for vertically stacking die inside chiplets. SANTA CLARA, Calif. , March 3, 2025 \/PRNewswire\/ &#8212;\u00a0Marvell Technology, Inc. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions,\u00a0has demonstrated its\u00a0first 2nm silicon IP for next-generation AI and cloud infrastructure. Produced on TSMC&#8217;s 2nm process, the working silicon is part of the Marvell platform for developing custom XPUs, switches and other technology &hellip; <\/p>\n<p class=\"link-more\"><a href=\"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/\" class=\"more-link\">Continue reading<span class=\"screen-reader-text\"> &#8220;Marvell Demonstrates Industry&#8217;s Leading 2nm Silicon for Accelerated Infrastructure&#8221;<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[],"tags":[],"class_list":["post-820638","post","type-post","status-publish","format-standard","hentry"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.5 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>Marvell Demonstrates Industry&#039;s Leading 2nm Silicon for Accelerated Infrastructure - Market Newsdesk<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Marvell Demonstrates Industry&#039;s Leading 2nm Silicon for Accelerated Infrastructure - Market Newsdesk\" \/>\n<meta property=\"og:description\" content=\"PR Newswire The Marvell\u00ae 2nm platform will enable hyperscalers to dramatically boost the performance and efficiency of their infrastructure to meet the performance and efficiency demands of the AI era. Built on TSMC&#8217;s 2nm process, the silicon is a critical part of the Marvell platform for developing next-generation custom AI accelerators, CPUs, and networking. The silicon IP includes high-speed 3D I\/O for vertically stacking die inside chiplets. SANTA CLARA, Calif. , March 3, 2025 \/PRNewswire\/ &#8212;\u00a0Marvell Technology, Inc. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions,\u00a0has demonstrated its\u00a0first 2nm silicon IP for next-generation AI and cloud infrastructure. Produced on TSMC&#8217;s 2nm process, the working silicon is part of the Marvell platform for developing custom XPUs, switches and other technology &hellip; Continue reading &quot;Marvell Demonstrates Industry&#8217;s Leading 2nm Silicon for Accelerated Infrastructure&quot;\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/\" \/>\n<meta property=\"og:site_name\" content=\"Market Newsdesk\" \/>\n<meta property=\"article:published_time\" content=\"2025-03-03T14:08:22+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/mma.prnewswire.com\/media\/356222\/marvell_logo.jpg\" \/>\n<meta name=\"author\" content=\"Newsdesk\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"Newsdesk\" \/>\n\t<meta name=\"twitter:label2\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data2\" content=\"5 minutes\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/#article\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/\"},\"author\":{\"name\":\"Newsdesk\",\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/#\\\/schema\\\/person\\\/482f27a394d4fda80ecb5499e519d979\"},\"headline\":\"Marvell Demonstrates Industry&#8217;s Leading 2nm Silicon for Accelerated Infrastructure\",\"datePublished\":\"2025-03-03T14:08:22+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/\"},\"wordCount\":911,\"image\":{\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/mma.prnewswire.com\\\/media\\\/356222\\\/marvell_logo.jpg\",\"inLanguage\":\"en-US\"},{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/\",\"url\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/\",\"name\":\"Marvell Demonstrates Industry's Leading 2nm Silicon for Accelerated Infrastructure - Market Newsdesk\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/#primaryimage\"},\"image\":{\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/mma.prnewswire.com\\\/media\\\/356222\\\/marvell_logo.jpg\",\"datePublished\":\"2025-03-03T14:08:22+00:00\",\"author\":{\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/#\\\/schema\\\/person\\\/482f27a394d4fda80ecb5499e519d979\"},\"breadcrumb\":{\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/#breadcrumb\"},\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/#primaryimage\",\"url\":\"https:\\\/\\\/mma.prnewswire.com\\\/media\\\/356222\\\/marvell_logo.jpg\",\"contentUrl\":\"https:\\\/\\\/mma.prnewswire.com\\\/media\\\/356222\\\/marvell_logo.jpg\"},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\\\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"Marvell Demonstrates Industry&#8217;s Leading 2nm Silicon for Accelerated Infrastructure\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/#website\",\"url\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/\",\"name\":\"Market Newsdesk\",\"description\":\"Latest Business News in Real Time\",\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"en-US\"},{\"@type\":\"Person\",\"@id\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/#\\\/schema\\\/person\\\/482f27a394d4fda80ecb5499e519d979\",\"name\":\"Newsdesk\",\"image\":{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/a0d0bd5b0f0ca12a265a459b13169dac35f33776d8501eda5e68844a366f2f46?s=96&d=mm&r=g\",\"url\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/a0d0bd5b0f0ca12a265a459b13169dac35f33776d8501eda5e68844a366f2f46?s=96&d=mm&r=g\",\"contentUrl\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/a0d0bd5b0f0ca12a265a459b13169dac35f33776d8501eda5e68844a366f2f46?s=96&d=mm&r=g\",\"caption\":\"Newsdesk\"},\"url\":\"https:\\\/\\\/www.marketnewsdesk.com\\\/index.php\\\/author\\\/newsdesk\\\/\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"Marvell Demonstrates Industry's Leading 2nm Silicon for Accelerated Infrastructure - Market Newsdesk","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/","og_locale":"en_US","og_type":"article","og_title":"Marvell Demonstrates Industry's Leading 2nm Silicon for Accelerated Infrastructure - Market Newsdesk","og_description":"PR Newswire The Marvell\u00ae 2nm platform will enable hyperscalers to dramatically boost the performance and efficiency of their infrastructure to meet the performance and efficiency demands of the AI era. Built on TSMC&#8217;s 2nm process, the silicon is a critical part of the Marvell platform for developing next-generation custom AI accelerators, CPUs, and networking. The silicon IP includes high-speed 3D I\/O for vertically stacking die inside chiplets. SANTA CLARA, Calif. , March 3, 2025 \/PRNewswire\/ &#8212;\u00a0Marvell Technology, Inc. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions,\u00a0has demonstrated its\u00a0first 2nm silicon IP for next-generation AI and cloud infrastructure. Produced on TSMC&#8217;s 2nm process, the working silicon is part of the Marvell platform for developing custom XPUs, switches and other technology &hellip; Continue reading \"Marvell Demonstrates Industry&#8217;s Leading 2nm Silicon for Accelerated Infrastructure\"","og_url":"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/","og_site_name":"Market Newsdesk","article_published_time":"2025-03-03T14:08:22+00:00","og_image":[{"url":"https:\/\/mma.prnewswire.com\/media\/356222\/marvell_logo.jpg","type":"","width":"","height":""}],"author":"Newsdesk","twitter_card":"summary_large_image","twitter_misc":{"Written by":"Newsdesk","Est. reading time":"5 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/#article","isPartOf":{"@id":"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/"},"author":{"name":"Newsdesk","@id":"https:\/\/www.marketnewsdesk.com\/#\/schema\/person\/482f27a394d4fda80ecb5499e519d979"},"headline":"Marvell Demonstrates Industry&#8217;s Leading 2nm Silicon for Accelerated Infrastructure","datePublished":"2025-03-03T14:08:22+00:00","mainEntityOfPage":{"@id":"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/"},"wordCount":911,"image":{"@id":"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/#primaryimage"},"thumbnailUrl":"https:\/\/mma.prnewswire.com\/media\/356222\/marvell_logo.jpg","inLanguage":"en-US"},{"@type":"WebPage","@id":"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/","url":"https:\/\/www.marketnewsdesk.com\/index.php\/marvell-demonstrates-industrys-leading-2nm-silicon-for-accelerated-infrastructure\/","name":"Marvell Demonstrates Industry's Leading 2nm Silicon for Accelerated Infrastructure - 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