{"id":739936,"date":"2023-03-14T11:03:09","date_gmt":"2023-03-14T15:03:09","guid":{"rendered":"https:\/\/www.marketnewsdesk.com\/index.php\/ase-drives-latency-and-bandwidth-innovation-with-vipack-fanout-package-on-package\/"},"modified":"2023-03-14T11:03:09","modified_gmt":"2023-03-14T15:03:09","slug":"ase-drives-latency-and-bandwidth-innovation-with-vipack-fanout-package-on-package","status":"publish","type":"post","link":"https:\/\/www.marketnewsdesk.com\/index.php\/ase-drives-latency-and-bandwidth-innovation-with-vipack-fanout-package-on-package\/","title":{"rendered":"ASE Drives Latency and Bandwidth Innovation with VIPack\u2122 Fanout Package-on-Package"},"content":{"rendered":"

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ASE Drives Latency and Bandwidth Innovation with VIPack\u2122 Fanout Package-on-Package<\/b><\/p>\n

SUNNYVALE, Calif.–(BUSINESS WIRE<\/a>)–
\nAdvanced Semiconductor Engineering, Inc. (ASE), a member of ASE Technology Holding Co., Ltd. (NYSE: ASX, TAIEX: 3711), today announced its most advanced Fan-Out-Package-on-Package (FOPoP) solution, developed to lower latency and deliver exceptional bandwidth advantages for the dynamic mobile and networking markets. Positioned under the ASE VIPack\u2122 platform, FOPoP reduces the electrical path by 3x and enables bandwidth density by up to 8x, allowing engine bandwidth expansion up to 6.4 Tbps per unit. FOPoP is a prominent package pillar addressing complex architectural and integration requirements that help enable next generation solutions for application processors, antenna-in-package devices, and silicon photonics (SiPh) applications.\n<\/p>\n

\nToday\u2019s competitive markets are placing unprecedented reliance on the performance advantages achieved through advanced packaging innovation. In particular, expanded form factor and electrical benefits support customers as they transform their products to connect more people and things, more efficiently than ever. With 5G in the mainstream, there is growing demand for sophisticated applications that rely on ultra-low latency, particularly in instances where speed and efficiency can prove both life-enabling and lifesaving. ASE\u2019s FOPoP structure leverages the most advanced integration technologies that extend long term roadmap requirements. New interconnect capabilities, proximity driven impedance enhancements, stacked vias, and vertical coupling enablement are amongst key drivers in the new vertical integration methodology used with the FOPoP structure.\n<\/p>\n

\nFor mobile applications, the fundamental high-density, substrate-less configuration of the FOPoP package results in exceptional package performance, due to elimination of the substrate parasitic inductance along with a thinner package form factor. Overall, the FOPoP structure provides higher interconnection density and integration through a finer line space RDL, a shorter interconnect length resulting in better electrical performance, and a smaller, thinner form factor. The FOPoP package platform is enhanced for increasing complexity and high-performance needs by enabling RDL on both sides of the die for increased integration and functionality. Furthermore, both landside caps and near-die deep trench capacitors can be implemented to meet the power integrity requirements of advanced nodes.\n<\/p>\n

\nFor networking applications, FOPoP helps to enable the next generation of bandwidth from 400G to 800G pluggable optical transceivers, while also presenting a highly viable integration solution for CPO. 3D stacking provides much shorter interconnection between the photonic integrated circuit (PIC) and controller to reach much higher speed. Small form factor SiPh engines become easier to package with an ASIC because FOPoP 3D stacking is a higher bandwidth per size solution, which is the key enablement of CPO.\n<\/p>\n

\nKey FOPoP benefits for the mobile market:\n<\/p>\n