{"id":464361,"date":"2021-03-24T10:48:15","date_gmt":"2021-03-24T14:48:15","guid":{"rendered":"http:\/\/www.marketnewsdesk.com\/?p=464361"},"modified":"2021-03-24T10:48:15","modified_gmt":"2021-03-24T14:48:15","slug":"cadence-successfully-tapes-out-tensilica-soc-on-globalfoundries-22fdx-platform-usingadaptive-bodybias-feature","status":"publish","type":"post","link":"https:\/\/www.marketnewsdesk.com\/index.php\/cadence-successfully-tapes-out-tensilica-soc-on-globalfoundries-22fdx-platform-usingadaptive-bodybias-feature\/","title":{"rendered":"Cadence Successfully Tapes Out Tensilica SoC on GLOBALFOUNDRIES 22FDX Platform UsingAdaptive BodyBias Feature"},"content":{"rendered":"<p>        <!--.bwalignc { text-align: center; list-style-position: inside }body {font:normal small Arial,Helvetica,sans-serif;color:#000;background-color:#fff;padding:24px;margin:0;} a img {border:0;} h3 {font-size:medium;color:#000;margin:0 0 1em 0; text-align:center;}-->  <\/p>\n<p class=\"bwalignc\"><b>Cadence Successfully Tapes Out Tensilica SoC on GLOBALFOUNDRIES 22FDX Platform Using<i \/>Adaptive Body<\/b><i \/><b>Bias Feature<\/b><\/p>\n<p class=\"bwalignc\"><i>Adaptive Body Bias feature on GF\u2019s 22FDX platform and Cadence digital full flow enable power efficiency and optimal PPA for IoT, voice processing and always-on sensor fusion SoCs<\/i><\/p>\n<p>SAN JOSE, Calif.&#8211;(<a href=\"http:\/\/www.businesswire.com\">BUSINESS WIRE<\/a>)&#8211;<br \/>\nCadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has collaborated with GLOBALFOUNDRIES<sup>\u00ae<\/sup> (GF<sup>\u00ae<\/sup>) to successfully tape out a Cadence<sup>\u00ae<\/sup> Tensilica<sup>\u00ae<\/sup> test chip on GF\u2019s 22FDX<sup>\u2122<\/sup> platform. This design used the Cadence digital full flow with Adaptive Body Bias (ABB) foundation IP along with the popular Cadence Tensilica HiFi 5 and Fusion F1 DSPs, which are ideal for high-growth markets including IoT, voice processing and always-on sensor fusion. The test chip produced the desired results, demonstrating ultra-low power and ultra-low voltage.\n<\/p>\n<p>\nThe Tensilica HiFi 5 and Fusion F1 DSPs and the digital full flow support Cadence\u2019s broader Intelligent System Design<sup>\u2122<\/sup> Strategy, enabling SoC design excellence. For more information on Cadence Tensilica IP, please visit <a rel=\"nofollow\" href=\"https:\/\/cts.businesswire.com\/ct\/CT?id=smartlink&amp;url=http%3A%2F%2Fwww.cadence.com%2Fgo%2Ftensilicagfpr&amp;esheet=52399709&amp;newsitemid=20210324005023&amp;lan=en-US&amp;anchor=www.cadence.com%2Fgo%2Ftensilicagfpr&amp;index=1&amp;md5=c0dddb811a1eb4d4537a10e69c7d7571\">www.cadence.com\/go\/tensilicagfpr<\/a>. For more information on Cadence advanced-node digital solutions, please visit <a rel=\"nofollow\" href=\"https:\/\/cts.businesswire.com\/ct\/CT?id=smartlink&amp;url=http%3A%2F%2Fwww.cadence.com%2Fgo%2Fdigitalgfpr&amp;esheet=52399709&amp;newsitemid=20210324005023&amp;lan=en-US&amp;anchor=www.cadence.com%2Fgo%2Fdigitalgfpr&amp;index=2&amp;md5=cd5687177981c632a397b618c718eb62\">www.cadence.com\/go\/digitalgfpr<\/a>.\n<\/p>\n<p>\nGF\u2019s 22FDX platform is a proven solution for a range of applications, including single-chip radio frequency (RF) and mixed-signal SoCs, which is a logical fit for Tensilica IP. The Tensilica HiFi 5 DSP is the performance leader for artificial intelligence (AI) speech and audio processing, making it ideal for digital assistants, infotainment and other voice-controlled products. The Tensilica Fusion F1 DSP efficiently runs the narrowband communications standards typically associated with IoT communications, such as Bluetooth Low Energy, Thread and Zigbee, Wi-Fi and global navigation satellite systems (GNSS).\n<\/p>\n<p>\nThe digital full flow incorporates unified implementation and timing- and IR-signoff engines, offering enhanced signoff convergence, reduced design margins and iterations, optimal power, performance and area (PPA) and improved throughput. The Cadence full flow with integrated signoff achieves convergence by concurrently closing the design for all physical, timing and reliability targets. For designers who want to combine digital, RF, mixed-signal and custom designs on the same 22FDX chip, GF offers a Cadence-based mixed-signal OpenAccess process design kit (PDK) to improve productivity. See separate press release at <a rel=\"nofollow\" href=\"https:\/\/cts.businesswire.com\/ct\/CT?id=smartlink&amp;url=http%3A%2F%2Fwww.cadence.com%2Fgo%2Fgfmsoarelease&amp;esheet=52399709&amp;newsitemid=20210324005023&amp;lan=en-US&amp;anchor=www.cadence.com%2Fgo%2Fgfmsoarelease&amp;index=3&amp;md5=1110c79612797be6c900a658f828576b\">www.cadence.com\/go\/gfmsoarelease<\/a>.\n<\/p>\n<p>\nThe Cadence digital flow used for the tapeout on GF\u2019s 22FDX platform included the Genus<sup>\u2122<\/sup> Synthesis Solution, Innovus<sup>\u2122<\/sup> Implementation System and Modus DFT Software Solution for implementation as well as the Tempus<sup>\u2122<\/sup> Timing Signoff Solution, Tempus ECO Option, Quantus<sup>\u2122<\/sup> Extraction Solution and Voltus<sup>\u2122<\/sup> IC Power Integrity Solution for full timing and power signoff.\n<\/p>\n<p>\n\u201cCadence\u2019s ongoing collaboration with GF to provide premier solutions to our joint customers has resulted in this compelling full-flow tapeout proof point with extremely attractive Tensilica DSP power, performance and area metrics,\u201d said Sanjive Agarwala, Corporate VP, R&amp;D, IP Group at Cadence. \u201cCustomers building products in the high-growth audio, voice, sensor fusion and communications markets can benefit by achieving highly efficient energy results, very low voltages and reduced project times with our digital flow and Tensilica HiFi 5 and Fusion F1 DSPs on GF\u2019s 22FDX platform.\u201d\n<\/p>\n<p>\nWith its high performance, power consumption, and broad feature integration capability, GF\u2019s differentiated 22FDX platform is the solution of choice for designers and innovators working in IoT, wearables, Edge AI and other exciting applications.\n<\/p>\n<p>\n\u201cThis tapeout validates the performance of the Cadence digital flow and Tensilica DSPs in conjunction with ABB enablement, which is a key differentiator for customers using our 22FDX platform,\u201d said Mark Ireland, vice president of Ecosystem and Design Solutions at GF. \u201cThe Tensilica DSPs\u2019 compelling PPA results with drain power voltage down to 0.5V are increasingly important to our customers designing portable devices that demand the extreme energy efficiency offered by our 22FDX solutions.\u201d\n<\/p>\n<p><b>About Cadence<\/b><\/p>\n<p>\nCadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world\u2019s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For six years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at <a rel=\"nofollow\" href=\"https:\/\/cts.businesswire.com\/ct\/CT?id=smartlink&amp;url=http%3A%2F%2Fwww.cadence.com&amp;esheet=52399709&amp;newsitemid=20210324005023&amp;lan=en-US&amp;anchor=cadence.com&amp;index=4&amp;md5=8fb4d4dc8038c24a3d11fbcc9280a8c7\">cadence.com<\/a>.\n<\/p>\n<p><i>\u00a9 2021 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at <a rel=\"nofollow\" href=\"https:\/\/cts.businesswire.com\/ct\/CT?id=smartlink&amp;url=http%3A%2F%2Fwww.cadence.com%2Fgo%2Ftrademarks&amp;esheet=52399709&amp;newsitemid=20210324005023&amp;lan=en-US&amp;anchor=www.cadence.com%2Fgo%2Ftrademarks&amp;index=5&amp;md5=311eea0df9da3018910fea28af460ed1\">www.cadence.com\/go\/trademarks<\/a> are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.<\/i><\/p>\n<p><img decoding=\"async\" alt=\"\" src=\"https:\/\/cts.businesswire.com\/ct\/CT?id=bwnews&amp;sty=20210324005023r1&amp;sid=flmnd&amp;distro=nx&amp;lang=en\" style=\"width:0;height:0\" \/><span class=\"bwct31415\" \/><\/p>\n<p id=\"mmgallerylink\"><span id=\"mmgallerylink-phrase\">View source version on businesswire.com: <\/span><span id=\"mmgallerylink-link\"><a href=\"https:\/\/www.businesswire.com\/news\/home\/20210324005023\/en\/\" rel=\"nofollow\">https:\/\/www.businesswire.com\/news\/home\/20210324005023\/en\/<\/a><\/span><\/p>\n<p>\nFor more information, please contact:<br \/>\n<br \/>Cadence Newsroom<br \/>\n<br \/>408-944-7039<br \/>\n<br \/><a rel=\"nofollow\" href=\"mailto:newsroom@cadence.com\">newsroom@cadence.com<\/a><\/p>\n<p><b>KEYWORDS:<\/b> United States North America California<\/p>\n<p><b>INDUSTRY KEYWORDS:<\/b> Electronic Design Automation Semiconductor Technology VoIP Software Internet Hardware<\/p>\n<p><b>MEDIA:<\/b><\/p>\n<table cellpadding=\"3\" cellspacing=\"3\">\n<tr>\n<td><font face=\"Arial\" size=\"2\"><b>Logo<\/b><\/font><\/td>\n<\/tr>\n<tr>\n<td><img decoding=\"async\" src=\"https:\/\/mms.businesswire.com\/media\/20210324005023\/en\/633339\/3\/Cadence_Logo_2_Reg_Black.jpg\" alt=\"Logo\" \/><\/td>\n<\/tr>\n<tr>\n<td><font face=\"Arial\" size=\"2\"><\/font><\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"<p>Cadence Successfully Tapes Out Tensilica SoC on GLOBALFOUNDRIES 22FDX Platform UsingAdaptive BodyBias Feature Adaptive Body Bias feature on GF\u2019s 22FDX platform and Cadence digital full flow enable power efficiency and optimal PPA for IoT, voice processing and always-on sensor fusion SoCs SAN JOSE, Calif.&#8211;(BUSINESS WIRE)&#8211; Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has collaborated with GLOBALFOUNDRIES\u00ae (GF\u00ae) to successfully tape out a Cadence\u00ae Tensilica\u00ae test chip on GF\u2019s 22FDX\u2122 platform. This design used the Cadence digital full flow with Adaptive Body Bias (ABB) foundation IP along with the popular Cadence Tensilica HiFi 5 and Fusion F1 DSPs, which are ideal for high-growth markets including IoT, voice processing and always-on sensor fusion. The test chip produced the desired &hellip; <\/p>\n<p class=\"link-more\"><a href=\"https:\/\/www.marketnewsdesk.com\/index.php\/cadence-successfully-tapes-out-tensilica-soc-on-globalfoundries-22fdx-platform-usingadaptive-bodybias-feature\/\" class=\"more-link\">Continue reading<span class=\"screen-reader-text\"> &#8220;Cadence Successfully Tapes Out Tensilica SoC on GLOBALFOUNDRIES 22FDX Platform UsingAdaptive BodyBias Feature&#8221;<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[],"tags":[],"class_list":["post-464361","post","type-post","status-publish","format-standard","hentry"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.5 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>Cadence Successfully Tapes Out Tensilica SoC on GLOBALFOUNDRIES 22FDX Platform UsingAdaptive BodyBias Feature - Market Newsdesk<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.marketnewsdesk.com\/index.php\/cadence-successfully-tapes-out-tensilica-soc-on-globalfoundries-22fdx-platform-usingadaptive-bodybias-feature\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Cadence Successfully Tapes Out Tensilica SoC on GLOBALFOUNDRIES 22FDX Platform UsingAdaptive BodyBias Feature - Market Newsdesk\" \/>\n<meta property=\"og:description\" content=\"Cadence Successfully Tapes Out Tensilica SoC on GLOBALFOUNDRIES 22FDX Platform UsingAdaptive BodyBias Feature Adaptive Body Bias feature on GF\u2019s 22FDX platform and Cadence digital full flow enable power efficiency and optimal PPA for IoT, voice processing and always-on sensor fusion SoCs SAN JOSE, Calif.&#8211;(BUSINESS WIRE)&#8211; Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has collaborated with GLOBALFOUNDRIES\u00ae (GF\u00ae) to successfully tape out a Cadence\u00ae Tensilica\u00ae test chip on GF\u2019s 22FDX\u2122 platform. This design used the Cadence digital full flow with Adaptive Body Bias (ABB) foundation IP along with the popular Cadence Tensilica HiFi 5 and Fusion F1 DSPs, which are ideal for high-growth markets including IoT, voice processing and always-on sensor fusion. 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(Nasdaq: CDNS) today announced that it has collaborated with GLOBALFOUNDRIES\u00ae (GF\u00ae) to successfully tape out a Cadence\u00ae Tensilica\u00ae test chip on GF\u2019s 22FDX\u2122 platform. This design used the Cadence digital full flow with Adaptive Body Bias (ABB) foundation IP along with the popular Cadence Tensilica HiFi 5 and Fusion F1 DSPs, which are ideal for high-growth markets including IoT, voice processing and always-on sensor fusion. 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