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- Expanding memory capacity for AI:<\/b> Second-generation Marvell\u00ae Structera\u2122 X 3406 and 3506 CXL 3.2 memory expanders add six DDR4\/DDR5 channels (50% more than the prior generation) and PCIe Gen 6 connectivity, supporting up to 9TB of DDR4 or 6TB of DDR5 per controller.\n<\/li>\n
- Addresses growing memory demand:<\/b> Multi-host sharing and inline LZ4 compression deliver up to 2\u20133x more effective capacity, with up to 40\u201350% faster time to first token at equivalent context length.\n<\/li>\n
- Preview and availability: <\/b>Demoing at the OCP Summit, the Structera X 3406 and 3506 are expected to sample in Q1 2027, extending the Structera X 2404 and 2504 architecture already shipping to hyperscalers.\n<\/li>\n<\/ul>\n
SANTA CLARA, Calif.–(BUSINESS WIRE<\/a>)–Marvell Technology, Inc<\/a>. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions, today announced the second-generation Marvell Structera X 3406 and Marvell Structera X 3506 CXL memory expanders, designed to help cloud, enterprise and AI infrastructure providers build more efficient, scalable and higher-performance systems for the next era of AI and computing. Designed to address the evolving needs of leading hyperscale datacenters, Structera X addresses the most demanding data center workload requirements.<\/p>\n
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<\/p>\nMarvell Six-channel CXL 3.2 Memory Expander for AI Inference<\/p>\n<\/div>\n
\nAI and ML workloads are rewriting the rules of data center design. Growing LLM sizes, expanding context windows and growing KV-cache requirements are driving unprecedented memory demands that traditional server architectures simply cannot meet. Memory is a critical constraint of AI performance and infrastructure efficiency.<\/p>\n
\nModern AI inference workloads, from LLM serving to deep learning recommendation models (DLRM), are memory bound. KV-cache capacity directly determines time to first token (TTFT), throughput, and XPU utilization. Structera X 3406\/3506 addresses these bottlenecks with:<\/p>\n
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- Industry-first six-channel CXL memory expansion:<\/b> Six DDR4\/DDR5 memory channels deliver 50% more channels than the previous generation, increasing memory bandwidth and capacity so AI servers can sustain larger models and longer context windows – up to 18 DDR4 RDIMM slots supporting 9TB for Structera X 3406 and 12 DDR5 RDIMM slots supporting 6TB for Structera X 3506.\n<\/li>\n
- Industry-first four host connectivity: <\/b>Enables memory capacity sharing with up to four hosts and up to 256GB\/s PCIe6.0 x16 of host bandwidth, improving memory utilization and efficiency across AI clusters.\n<\/li>\n
- 5x higher LZ4 compression throughput from previous generation:<\/b> Up to 250GB\/s compression\/decompression throughput unlocks up to 2\u20133x more effective memory capacity, depending on workloads.\n<\/li>\n
- StructGuard\u2122 enterprise-grade RAS<\/b>: Provides advanced error correction to enhance memory reliability and resilience against DRAM device failures.\n<\/li>\n
- Industry-first post-quantum security:<\/b> Combines post-quantum cryptography, Caliptra 2.0, CXL IDE and AES-256 memory encryption to provide advanced data protection.\n<\/li>\n<\/ul>\n
\nFor DLRM workloads, Structera X delivers up to 2x higher queries per second and 2\u20133x more effective embedding-table capacity per controller. For LLM serving, Structera X delivers up to 40\u201350% faster TTFT at equivalent context length, or up to 2x longer supportable context windows at equivalent latency compared to the previous generation.<\/p>\n
\nBuilding on the success of the first-generation Structera X 2404\/2504, the Structera X 3406\/3506 leverages the proven software stack and ecosystem integrations enabling an accelerated ramp. The Marvell CXL ecosystem continues to expand across the full data center stack through close partnership with CPU and memory vendors, OEMs, ODMs and system integrators.<\/p>\n
\n\u201cCXL is starting to gain widespread adoption in AI systems since they reap strong benefits from its very high bandwidth and support of large memory sizes,\u201d said Jim Handy, general director of Objective Analysis, and author of a CXL market report. \u201cIn addition, today\u2019s memory shortage and subsequent high prices are driving IT managers to use CXL to re-deploy used DDR4 DIMMs into DDR5 systems for immediate cost savings. In the near future, these same managers will use CXL\u2019s memory pools to reduce stranded memory and drive greater savings, and they will find controllers that offer compression, as this one does, to be even more interesting.\u201d<\/p>\n
\nBy bringing together connectivity, memory and storage technologies, the expanded data center portfolio improves how compute and memory work across AI systems, increasing utilization, infrastructure efficiency and AI performance. These next-generation offerings increase access to memory resources, improving both memory and compute utilization, helping customers optimize AI infrastructure performance as workloads continue to grow in scale and complexity.<\/p>\n
\n\u201cMarvell is the only provider with a complete end-to-end CXL portfolio spanning memory expansion (Structera X), near-memory acceleration (Structera A), and PFMA (Photonic Fabric\u2122 Memory Appliance), pod-scale CXL memory-sharing appliance, giving customers a complete portfolio from direct-attach to disaggregated memory pooling,\u201d said Will Chu, executive vice president and general manager, Custom Cloud Solutions at Marvell. \u201cWe are delivering industry-leading CXL controllers, co-developed with leading hyperscalers to address the most demanding AI infrastructure requirements.\u201d<\/p>\n
Industry Ecosystem Support<\/b><\/p>\n
\n\u201cAMD is advancing an open ecosystem that gives enterprises the freedom to build infrastructure around their evolving workloads,\u201d said Raghu Nambiar, corporate vice president, Data Center Ecosystems and Solutions, AMD. \u201cCXL is an important part of that vision, enabling customers to expand memory capacity and use resources more efficiently as AI and data-intensive applications grow. Our collaboration with Marvell builds on the performance and scalability of AMD EPYC processors to help enterprises realize those benefits, bringing greater flexibility and long-term value to their data center investments.\u201d<\/p>\n
\n\u201cAs AI becomes more agentic, memory and compute need to scale together to meet growing infrastructure demands. Marvell\u2019s latest Structera X controllers bring CXL 3.2, memory expansion and compression to the Arm ecosystem, giving hyperscaler customers more options to efficiently support complex AI workloads,\u201d said Eddie Ramirez, vice president of go-to-market, Cloud AI, Arm.<\/p>\n
\n\u201cMarvell and Alibaba are collaborating to advance CXL memory solutions for the rapidly growing demands of AI infrastructure. As AI models and workloads continue to increase in scale, expanding memory capacity and bandwidth without compromising system performance and efficiency has become a critical requirement. CXL enables a more flexible approach to memory expansion and sharing, providing a path to scale memory resources across increasingly complex AI systems. Our collaboration with Marvell brings together its leadership in CXL technology with Alibaba\u2019s experience in large-scale AI and cloud infrastructure to develop memory architectures designed for the next generation of AI data centers.\u201d<\/p>\n
\n\u201cCXL is reshaping how memory is deployed in data centers, and our work with Marvell ensures customers can confidently deploy Structera with Samsung DDR memory for reliable, high-performance systems,” said Jangseok Choi (JS Choi), vice president of the Memory Product Planning Team at Samsung Electronics. \u201cThe move to CXL 3.2 and six memory channels in Structera X 3406\/3506 further strengthens the flexibility our joint customers need.\u201d<\/p>\n
\n\u201cWorking with Marvell to validate Structera with SK hynix memory supports our shared goal of making memory expansion more accessible and flexible,” said Uksong Kang, Head of Next Generation Product Planning and Enabling at SK hynix. “Structera X 3406\/3506 gives customers the tools they need to build future-ready, disaggregated architectures with less friction and more choice.\u201d<\/p>\n
Availability<\/b><\/p>\n
\nMarvell Structera X 3406 and Structera X 3506 CXL memory expansion controllers are expected to sample in Q1 2027.<\/p>\n
\nVisit Marvell Booth #B31 at the 2026 OCP Global Summit<\/a>, Oct. 12-15 in San Jose, Calif., to learn more about the company\u2019s newest memory and storage offerings.<\/p>\n
About Marvell<\/b><\/p>\n
\nTo deliver the data infrastructure technology that connects the world, we\u2019re building solutions on the most powerful foundation: our partnerships with our customers. Trusted by the world\u2019s leading technology companies for over 30 years, we move, store, process and secure the world\u2019s data with semiconductor solutions designed for our customers\u2019 current needs and future ambitions. Through a process of deep collaboration and transparency, we\u2019re ultimately changing the way tomorrow\u2019s enterprise, cloud and carrier architectures transform\u2014for the better.<\/p>\n
\nMarvell and the M logo are trademarks of Marvell or its affiliates. Please visit www.marvell.com<\/a> for a complete list of Marvell trademarks. Other names and brands may be claimed as the property of others.<\/p>\n
\nThis press release contains forward-looking statements within the meaning of the federal securities laws that involve risks and uncertainties. Forward-looking statements include, without limitation, any statement that may predict, forecast, indicate or imply future events, results or achievements. Actual events, results or achievements may differ materially from those contemplated in this press release. Forward-looking statements are only predictions and are subject to risks, uncertainties and assumptions that are difficult to predict, including those described in the \u201cRisk Factors\u201d section of our Annual Reports on Form 10-K, Quarterly Reports on Form 10-Q and other documents filed by us from time to time with the SEC. Forward-looking statements speak only as of the date they are made. Readers are cautioned not to put undue reliance on forward-looking statements, and no person assumes any obligation to update or revise any such forward-looking statements, whether as a result of new information, future events or otherwise.<\/p>\n
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View source version on businesswire.com: <\/span>https:\/\/www.businesswire.com\/news\/home\/20261012029557\/en\/<\/a><\/span><\/p>\n
Media Contact:
\n<\/b>
Erica Coleman
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pr@marvell.com<\/a><\/p>\nKEYWORDS:<\/b> California United States North America<\/p>\n
INDUSTRY KEYWORDS:<\/b> Networks Semiconductor Data Management Technology Artificial Intelligence<\/p>\n
- Industry-first four host connectivity: <\/b>Enables memory capacity sharing with up to four hosts and up to 256GB\/s PCIe6.0 x16 of host bandwidth, improving memory utilization and efficiency across AI clusters.\n<\/li>\n
- Addresses growing memory demand:<\/b> Multi-host sharing and inline LZ4 compression deliver up to 2\u20133x more effective capacity, with up to 40\u201350% faster time to first token at equivalent context length.\n<\/li>\n
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